Synthesis and Analysis of Active Scheduling Procedures Targeting Reconfigurable Environment

Abstract

In the computing environment, multiple data packets arrive at the node for processing. Multiple tasks are engaged to handle these data packets which accepts these data packets process them and executes further required steps. For handling the multiple data packets simultaneously, multiple tasks are engaged which utilizes the limited resources on time sharing basis. To make the limited resources useful and handle the multiple tasks efficiently, strong, highly active task scheduling algorithm is required. This research paper demonstrates the multiple tasks arriving and getting executed simultaneously in addition to the routing tasks. The algorithm is described using high speed integrated circuit hardware description language. The description is targeted to the modern concurrent programmable hardware architecture. The hardware description is performed using the Xilinx Vivado High Level Synthesis (HLS) Tool.